1. Field of the Invention
The present invention in general relates to semiconductor integrated circuit fabrication. In particular, the present invention relates to a method of fabricating a lightly doped drain transistor having an inverse-T gate structure.
2. Description of the Related Arts
If device dimensions are reduced and the supply voltage remains unchanged, the electric field generated in a metal-oxide-semiconductor (MOS) transistor increases. If the electric field becomes strong enough, it can give rise to hot-carriers near the drain while operated in the saturation mode. Some of these hot carriers pass to the gate electrode and thus constitute a gate current. Some of the hot carriers inject into the gate oxide but do not reach the gate electrode, which causes trapping of the hot carriers and result in threshold voltage variation. To overcome hot-carrier degradation, lightly doped drain (LDD) structures have been proposed.
In the LDD structure, the drain is formed by two implants. One is self-aligned to the gate electrode to create lightly-doped regions, and the other is self-aligned to the gate electrode, on which oxide sidewall spacers have been formed, so as to create heavily-doped regions. Accordingly, each lightly-doped region is arranged between the associated heavily-doped region and the channel region. The purpose of the lightly-doped regions is to reduce the electric field near the drain and decrease the occurrence of hot carriers. However, because the gate electrode can not control the lightly-doped regions, which have higher parasitic resistance due to lighter dose implantation, the carrier mobility is decreased and the associated current drive is reduced.
To overcome this problem, J. E. Moon et al., "A New LDD Structure: Total Overlap with Polysilicon Spacers (TOPS)," IEEE Electron Device Letters, 11(5), 1990, pp.221-223 presents a fully overlapped lightly doped drain structure with polysilicon spacers to increase carrier mobility and thus improve the current drive capability. Nevertheless, such a TOPS device shows significant gate-induced drain leakage (GIDL). Therefore, provision of a lightly doped drain transistor is needed, the lightly-doped regions of which can be fully covered by the gate electrode so as to increase the current drive capability as well as restrain gate-induced drain leakage and prevent hot-carrier degradation.